Channel 2 configure register 0
| TX_START_CH0 | Set this bit to start sending data on CHANNEL%s. |
| MEM_RD_RST_CH0 | Set this bit to reset read ram address for CHANNEL%s by accessing transmitter. |
| APB_MEM_RST_CH0 | Set this bit to reset W/R ram address for CHANNEL%s by accessing apb fifo. |
| TX_CONTI_MODE_CH0 | Set this bit to restart transmission from the first data to the last data in CHANNEL%s. |
| MEM_TX_WRAP_EN_CH0 | This is the channel %s enable bit for wraparound mode: it will resume sending at the start when the data to be sent is more than its memory size. |
| IDLE_OUT_LV_CH0 | This bit configures the level of output signal in CHANNEL%s when the latter is in IDLE state. |
| IDLE_OUT_EN_CH0 | This is the output enable-control bit for CHANNEL%s in IDLE state. |
| TX_STOP_CH0 | Set this bit to stop the transmitter of CHANNEL%s sending data out. |
| DIV_CNT_CH0 | This register is used to configure the divider for clock of CHANNEL%s. |
| MEM_SIZE_CH0 | This register is used to configure the maximum size of memory allocated to CHANNEL%s. |
| CARRIER_EFF_EN_CH0 | 1: Add carrier modulation on the output signal only at the send data state for CHANNEL%s. 0: Add carrier modulation on the output signal at all state for CHANNEL%s. Only valid when RMT_CARRIER_EN_CH%s is 1. |
| CARRIER_EN_CH0 | This is the carrier modulation enable-control bit for CHANNEL%s. 1: Add carrier modulation in the output signal. 0: No carrier modulation in sig_out. |
| CARRIER_OUT_LV_CH0 | This bit is used to configure the position of carrier wave for CHANNEL%s.1’h0: add carrier wave on low level.1’h1: add carrier wave on high level. |
| AFIFO_RST_CH0 | Reserved |
| CONF_UPDATE_CH0 | synchronization bit for CHANNEL%s |